Research Engineer · AI Systems · FPGA · Embedded AI

Umut Can
Altın

umut.altin@donders.ru.nl  ·  Nijmegen, Netherlands  ·  +31 6 814 053 82

Research engineer at the Donders Institute for Brain, Cognition and Behaviour, Radboud University, working on FPGA-based acceleration of neural networks and embedded AI pipelines. My work sits at the intersection of hardware design, machine learning, and neurotechnology — from on-chip learning systems that bypass backpropagation to real-time speech enhancement on embedded FPGA.

Alongside research, I founded Morfics, an FPGA and edge infrastructure platform, and Tixtip, an ML-powered event intelligence platform. I have presented at Donders Day 2025 and 2026, ICNE 2025, and spoken at TEDxYouth and university AI events.

Research & Projects Publications Radboud Profile ↗ Contact
UCA
Umut Can Altın
Research Engineer — AI Systems
Donders Centre for Cognition · Machine Learning & Neural Computing
InstitutionDonders Institute, Radboud University
DepartmentMachine Learning & Neural Computing
LocationThomas van Aquinostraat 4
6525 GD Nijmegen, NL
Experience8+ years
EducationBSc Electrical & Electronics Eng.
Eskişehir Technical University, 2020
CompaniesMorfics (Founder) · Tixtip (Founder)
GitHubumutcanaltin
LinkedInumut-can-altin
LanguagesTurkish (native) · English (professional) · Dutch (beginner)
01

Core Expertise

8+ years spanning hardware design, AI systems, backend engineering, and network intelligence
Hardware
FPGA & Embedded Systems
HLSVHDLAXI/DMAKria KV260KR260PYNQ-Z2HW-SW co-designFixed-point designSoC
AI / ML
Embedded AI & Learning Systems
Embedded AIReinforcement learningNode perturbationNeuro-symbolic AISpeech enhancementML benchmarkingInference pipelines
Performance Engineering
Hardware-Aware Optimization
Latency reductionProfilingMemory optimizationBRAM-aware planningOperator fusionData-movement analysis
Backend & Cloud
Systems & Infrastructure
FlaskFastAPIFirebase/FirestoreGoogle CloudEmbedded LinuxController systemsAPI lifecycle
Networks / Telecom
Network Intelligence
eBPF/XDPPacket filteringO-RAN5G/6GAnomaly detectionIDS/Firewall ML
Languages
Programming
PythonCC++C#JavaScriptVHDLEmbedded Linux
02

Experience

Research, engineering leadership, and founding across the Netherlands and Turkey
2023 — Present
Current role
Research Engineer — AI Systems
Donders Institute for Brain, Cognition and Behaviour · Radboud University · Nijmegen, NL
Design FPGA-based acceleration architectures for neural-network structures and embedded AI pipelines under the DBI2 initiative. Run hardware-aware ML optimization and benchmarking experiments across latency, resources, power, and deployment constraints. Research scalable alternatives to backpropagation — including node perturbation and on-chip learning mechanisms — and prepare papers, posters, and demos for scientific conferences. Listed under both the Donders Centre for Cognition and the Machine Learning & Neural Computing group.
FPGAHLSEmbedded AINode PerturbationKria KV260ResearchDBI2
2026 — Present
Founder
Lead Engineer & Founder — Morfics
Morfics · Netherlands
Building an FPGA and edge-computing infrastructure platform for deploying user bitstreams, AI accelerators, and API-accessible hardware services. Designed the controller architecture for board allocation, queue and dedicated usage modes, backend APIs, and Firebase-backed state management across Kria KV260, KR260, and PYNQ-Z2 devices.
FPGA-as-a-ServiceFastAPIFirebaseEdge AIEmbedded Linux
2025 — Present
Founder
Lead Engineer & Founder — Tixtip
Tixtip · Netherlands
Building an event-ticketing and organizer intelligence platform with ticket sales, QR door scanning, payment-provider integration, and organizer analytics. Defined the ML roadmap for organizer insights, marketing optimization, and demand forecasting while keeping operational workflows simple for event organizers.
MLDemand ForecastingFull StackAnalytics
2023 — 2024
AI Engineer — R&D
TeknoDC · Turkey
Architected ML-driven firewall systems integrating anomaly detection into packet-processing workflows. Optimized packet filtering using eBPF/XDP and reduced inference-path latency for high-throughput network environments.
eBPF/XDPAnomaly DetectionNetwork MLFirewall Systems
2022 — 2023
Full Stack Engineer — R&D
Rebocoon Bionics · Netherlands
Developed cross-platform mobile applications, backend APIs, production services, and system integrations. Owned API lifecycle management, deployment workflows, and maintenance of service-level backend components.
MobileAPIsBackendSystem Integration
2020 — 2022
Engineering Lead & Partner
AR AiTech · Turkey
Led AI optimization projects for 5G/6G O-RAN architectures, OpenStack-based datacenter routing, cybersecurity anomaly detection, and banking-system optimization. Managed cross-functional R&D teams and delivered full product lifecycle execution from prototype to enterprise integration.
O-RAN5G/6GTeam LeadershipOpenStackCybersecurity
2019 — 2020
R&D Engineer — Multi-UAV AI Systems
Pirireis Bilisim · Turkey
Implemented multi-agent reinforcement-learning navigation systems for UAV fleets using Dronekit and Ardupilot, with full simulation-to-real evaluation workflows and evolutionary optimization strategies.
Multi-agent RLUAVDronekitArdupilot
2016 — 2019
AI Researcher & Embedded Systems Developer
Anadolu University & Eskişehir Technical University · Turkey
Built RF fingerprinting indoor-positioning pipelines, Raspberry Pi data-acquisition systems, MCU/MPU simulations, and autonomous vehicle embedded components. Graduation project: Deep Learning Inference Acceleration Library (TensorFlow to FPGA).
RF FingerprintingEmbeddedRaspberry PiDeep Learning Acceleration
03

Research & Projects

Selected work from Donders Institute and independent engineering
Published · DAFx 2026 arXiv:2606.04221 FPGA · Speech
Embedded FPGA Speech Enhancement for Hearing Aids
Co-developed (equal contribution) the embedded FPGA deployment of SuDoRM-RF++ speech separation and denoising on the AMD-Xilinx Kria KV260, evaluated at FP32 and 16-bit fixed-point precision. Fixed-point denoising achieves a first-sample latency of 9.7 ms — meeting the 10 ms clinical hearing-aid threshold. Identified data movement and on-chip parameter caching as the dominant latency bottlenecks, with precision reduction halving memory footprint without degrading speech quality.
arXiv:2606.04221 ↗
With: Feyisayo Olalere, Kiki van der Heijden, Marcel van Gerven · Radboud University / Donders Institute
Donders Day 2026 Neuro-Symbolic AI Safety
LogicTiny — Compact Neuro-Symbolic RL Safety Layer
Designed a compact decision layer combining policy scores with Signal Temporal Logic (STL)-style robustness, sensor availability flags, and learned logic weights for safer autonomous action selection under real-world uncertainty. Built for on-chip deployment in resource-constrained autonomous systems. Presented as first author at Donders Day 2026 (Theme 4: Natural Computing and Neurotechnology), supervised by Marcel van Gerven.
With: Marcel van Gerven
Donders Day 2026 Control Systems Simulation
ControDyna — Control-in-the-Loop Simulator
Platform for graph-structured dynamical systems with support for external controllers and CPU/GPU/FPGA execution paths. Enables precise latency measurement, controller communication delay analysis, and accelerated real-time control experimentation across heterogeneous hardware. Contributed to and co-supervised the Donders Day 2026 poster presentation.
With: Muammer Yigit Celik, Dr. Y. Qin (Yuzhen), Marcel van Gerven
Upcoming publication Compiler · ML Systems
FPGAI Compiler — Hardware-Aware ML Compiler
Designed graph IR, operator-fusion, scheduling-aware optimization, BRAM-aware memory planning, and HLS code-generation flow for end-to-end compilation of ML graphs to synthesizable FPGA hardware. Enables deployment of trained models directly onto embedded FPGA targets without manual HLS authoring.
🏆 Poster Prize · Donders Day 2025 ICNE 2025
On-Chip Node Perturbation Acceleration
FPGA-based node-perturbation training architecture as a biologically plausible alternative to backpropagation. Features memory-efficient update logic and parallel perturbation units that enable on-chip learning without weight transport. Won the Poster Prize at Donders Day 2025 and presented at ICNE 2025.
IEEE · 2021 Multi-Agent RL UAV Systems
Evolutionary RL for Swarm UAV Coordination
Multi-agent reinforcement-learning navigation systems for UAV fleets using Dronekit and Ardupilot, with evolutionary optimization strategies for decentralized coordination. Full simulation-to-real evaluation pipeline with published IEEE results.
04

Publications, Awards & Talks

Peer-reviewed publications, conference posters, and public lectures
2026
F. Olalere, U. Altın, K. van der Heijden, M. van Gerven — "Feasibility of Time-Domain DNN-Based Speech Enhancement on Embedded FPGA for Hearing Aid"
International Conference on Digital Audio Effects (DAFx 2026) · arXiv:2606.04221 · Equal contribution
arXiv ↗ DAFx 2026 Equal contrib.
2021
U. Altın et al. — "Evolutionary Reinforcement Learning for the Coordination of Swarm UAVs"
IEEE, 2021
IEEE
2019
U. Altın et al. — "Effect of Distance Metrics on Positioning Accuracy"
IEEE, 2019
IEEE
TBA
FPGAI Compiler — hardware-aware ML compiler for FPGA deployment
Engineering contribution & paper · Forthcoming
Forthcoming
TBA
On-Chip Node Perturbation Acceleration — embedded on-chip learning hardware
Engineering contribution & paper · Forthcoming
Forthcoming
🏆 Prize
Poster Prize — Node Perturbation in Hardware Implementation
Donders Day 2025 · Radboud University
Poster · Conference
Node Perturbation — hardware-compatible learning implementation
ICNE 2025
Poster · First Author
LogicTiny: Compact Neuro-Symbolic RL for Safe Autonomous Decision-Making
Donders Day 2026 — Theme 4: Natural Computing & Neurotechnology
Poster · Contributor
Control-in-the-Loop Platform for Simulating Graph-Structured Dynamical Systems
Donders Day 2026 — Theme 4: Natural Computing & Neurotechnology
Public Talk · 2022
"What is Artificial Intelligence?" — Public talk
TEDxYouth@BAL
Guest Lecture
Reinforcement Learning — Guest lecture
InnovaLaw Summit — AI research areas & possible outcomes
AI Days / GDSC Beykent University
05

Contact

Let's work
together

Open to research collaboration, engineering consulting on FPGA and AI systems, guest lectures, and conversations at the intersection of hardware and machine intelligence.

Areas of interest
Research CollaborationFPGA acceleration, on-chip learning, neuro-symbolic AI, embedded hardware for neural networks
Engineering ConsultingHardware-aware ML systems, FPGA deployment pipelines, embedded AI architecture, edge computing
Talks & Guest LecturesReinforcement learning, FPGA acceleration, embedded AI, accessible AI for non-technical audiences
Technical AdvisoryAI architecture, edge computing strategy, hardware-software co-design, embedded systems